The present invention generally relates to semiconductor lasers and more particularly to a semiconductor laser that has a window region of a small quantity of laser light absorption at its light-emitting end surfaces. A semiconductor laser of this type is applied to an optical disk drive and the like that requires a high output.
The present invention also relates to a semiconductor laser fabricating method capable of fabricating the semiconductor laser of the above-mentioned type with high accuracy.
In the high-output semiconductor laser for use in an optical disk drive or the like, the light-emitting end surface sometimes deteriorates due to high density of light, possibly causing damage called COD (Catastrophic Optical Damage). As a measure against this, it has been proposed to provide the light-emitting end surfaces with a window region that absorbs less laser light than the inside of the active layer does.
As a conventional high-output semiconductor laser that has a window region at its light-emitting end surfaces, there is one as shown in FIG. 20 (see WO96/11503). This semiconductor laser has on an n-type GaAs substrate 1 an n-conductivity type buffer layer 11, an n-conductivity type first cladding layer 2′, a first separate confinement layer 2″, an active layer 3, a second separate confinement layer 4″, a p-conductivity type second cladding layer 4′ and an etching stopper layer (having a thickness of 0.01 μm) 5. A p-conductivity type second cladding layer 40, a p-conductivity type intermediate layer 9 and a p-conductivity type first contact layer 10 are provided on this etching stopper layer 5 so as to constitute a mesa 12 that extends in a striped shape in the direction of line XXI—XXI in FIG. 20. Regions at both sides of the mesa 12 are filled with an n-type current blocking layer 13. A second contact layer 6 and an electrode (connection conductor) 7 are provided over the mesa 12 and the n-type current blocking layer 13. On the other hand, an electrode (connection conductor) 8 is formed over the rear surface of the n-type GaAs substrate 1.
As shown in FIG. 21 (showing a cross section taken along the line XXI—XXI of FIG. 20), the active layer 3 is constructed of a laminate of two quantum well layers 3′ and a barrier layer 3″ therebetween. Portions, which belong to the active layer 3 and are located near light-emitting end surfaces (exit surfaces) 50 and 51, serve as window regions (passive regions) 3B where the laser light absorption is less than in the active layer inside 3A.
This semiconductor laser is fabricated as follows. As shown in FIG. 22, the layers of the n-conductivity type buffer layer 11 through the contact layer 10 are first grown on the n-type GaAs substrate 1 by OMVPE (organometallic vapor phase epitaxy). Next, a masking layer 30 made of silicon oxide is formed so as to have opening portions 31 and 32 along the light-emitting end surfaces 50 and 51. The wafer in this state is introduced in a closed capsule together with zinc arsenide and the capsule is heated to a temperature of 600° C., so that Zn atoms 59 diffuse from the upper surface side of the contact layer 10 beyond the active layer 3. Through these processes, local intermixing of the active layer 3 (namely making a part of the active layer 3 a mixed crystal) takes place at the portions near the light-emitting end surfaces 50 and 51, which serve as the window regions 3B where the energy bandgap is greater and accordingly the laser light absorption is less than in the active layer inside 3A. After the mask 30 is removed, a strip-shaped mask 40 is formed, which extends perpendicularly to the light-emitting end surfaces 50 and 51, as shown in FIG. 23. Next, the mesa 12 is formed just under the mask 40 by etching the semiconductor layers 10, 9, and 40 at portions on both sides of the mask 40 until the etching stopper layer 5 is reached. Subsequently, as shown in FIG. 20, the blocking layer 13 is formed on both sides of the mesa 12 by OMVPE. After planarizing the blocking layer and removing the mask 40, the second contact layer 6 is formed by using the OMVPE method again. Then, the electrodes 7 and 8 are formed over the upper surface of the contact layer 6 and the lower surface of the substrate 1, respectively (the fabrication completed).
According to the aforementioned fabricating method, during the step of forming the window regions (passive regions) 3B through intermixing of the active layer 3 by diffusion of impurity, intermixing of the etching stopper layer 5 may also take place. Then, there will be a problem that the etching stopper layer 5 and the second cladding layer (lower portion) 4′ are etched in the process of forming the mesa 12, which leads to reduction of the processing accuracy of the mesa 12. If the etching progresses extremely, there may arise a further problem that the current blocking layer 13 and the n-type cladding layer 11 are disadvantageously electrically short-circuited. On the other hand, if the annealing temperature and time are reduced to avoid these problems related to the fabricating process, then there may conversely arise a problem that sufficient intermixing does not take place in the window region 3B, resulting in difficulties in obtaining the effect of restraining photoabsorption.